MANY-CORE SOC ARCHITECTURE
Many-core SoC architecture with runtime reconfiguration
Many-core SoC architecture with runtime reconfiguration
Domain-specific architectures instantiated on a shared compute fabric
Automotive · AI & HPC · Telecommunications
Public source
Morphing Machines REDEFINE is a publicly named many-core SoC architecture for runtime-reconfigurable computing.
Silicon Showcase illustrative visual
Illustrative representation based on publicly available technical information.
Morphing Machines REDEFINE is a many-core processor architecture that instantiates domain-specific compute structures on a shared fabric at runtime.
Official technology pages describe a homogeneous fabric of processing cores on which domain-specific architectures can be instantiated during operation, combining many-core processing with runtime reconfiguration. Morphing Machines presents REDEFINE for avionics, automotive and 5G/6G telecommunications workloads, and as an accelerator for high-performance analytics and related compute tasks. This independent listing identifies the REDEFINE architecture and does not catalog individual core-count configurations. Programming, configuration and current availability should be confirmed on Morphing Machines' current technology pages.
Key characteristics associated with this technology.
Many-core SoC architecture with runtime reconfiguration
Domain-specific architectures instantiated on a shared compute fabric
Presented for avionics, automotive, telecommunications and analytics workloads
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